1. Field of the Invention
This invention relates to an information processing apparatus, and in particular to a digital information recording-reproducing apparatus for recording and reproducing information by the use of a recording medium such as an optical disk or a magneto-optical disk.
2. Related Background Art
FIG. 1 of the accompanying drawings shows a block diagram of the recording system of an information recording-reproducing apparatus according to the prior art, and FIG. 2 of the accompanying drawings shows a block diagram of the reproducing system of the apparatus.
The recording system, as shown in FIG. 1, is comprised of an encoding circuit 1, a synchronous pattern adding circuit 2, an amplifier 3 and a recording transducer 4. Recording data is encoded by the encoding circuit 1, whereafter a synchronous pattern is added to the encoded recording data by the synchronous pattern adding circuit 2, and further the encoded recording data is amplified by the amplifier 3. The amplified data is sent to the recording transducer 4, in which it is recorded on a recording medium 5. The recording medium 5 may be one of various mediums such as a disk-like medium like an optical disk or a magneto-optical disk, a tape-like medium and a card-like medium.
On the other hand, the reproducing system, as shown in FIG. 2, is provided with a reproduction transducer 6 for reading recorded information from the recording medium, an amplifier 7 for amplifying the signal read by the reproduction transducer 6, and a binarizing circuit 8 for converting the amplified signal into binary signals of 1 and 0. PLL 9 is a circuit for producing a synchronous clock from a reproduction signal when reproducing the recorded signal by a self-clocking reproduction system, and a discriminating circuit 10 is a circuit for synchronizing the binary data by the synchronous clock and producing synchronous data.
A sector mark detecting circuit 11 is a circuit for detecting a sector mark recorded on the recording medium 5 and outputting a sector mark detection signal (SM signal). This SM signal is sent to a synchronous pattern detecting circuit 12, by which the synchronous pattern added by the synchronous pattern adding circuit 2 is detected with the SM signal as the reference, and a synchronous pulse is output on the basis thereof. The synchronous pattern is indicative of the code data read-out starting position, and in a decoding circuit 13, data encoded on the basis of the synchronous pattern is decoded into the original data. There are known various encoding systems such as FM, MFM, Miller.sup.2 and EFM (2.7).
FIG. 3 of the accompanying drawings shows an example of the recording format of the recording medium 5. In FIG. 3, SM designates the sector mark, and Sync denotes the synchronous pattern. In this example, the sector mark is 5 B (bytes) and the synchronous pattern is 3 B. The synchronous pattern detecting circuit 12, as previously described, detects the synchronous pattern with the sector mark as the reference. VFO designates a predetermined period pattern for locking PLL 9.
FIG. 4 of the accompanying drawings shows an example of the discriminating circuit 10. In this example, the discriminating circuit 10 is comprised of two D type flip-flop circuits (hereinafter referred to as FF circuits) 14 and 15. A signal "1" is normally input to the D terminal of the FF circuit 14, and binary data is input to the CK (clock) terminal of the FF circuit 14. The output signal of the FF circuit 14 is input to the D terminal of the FF circuit 15, and a synchronous clock is input to the CK terminal of the FF circuit 15.
The operation of the discriminating circuit 10 will now be described with reference to a time chart shown in FIG. 5 of the accompanying drawings.
FIG. 5(a) shows a reproduction signal read out by the reproduction transducer 6, FIG. 5(b) shows binary data obtained by binarizing this reproduction signal by the binarizing circuit 8 (in this case, binarizing the reproduction signal by the use of the differentiation detection method), and FIG. 5(c) shows the synchronous clock produced by PLL 9. FIG. 5(d) shows the output signal of the FF circuit 14. One period t of the synchronous clock is defined as a detection window for the rising edge of the binary data. That is, when the binary data has risen during .+-.1/2t of the synchronous clock, the discriminating circuit 10 discriminates that binary data as a pulse. Accordingly, since in FIG. 5, the binary data rises during the window period of .+-.1/2t, synchronous data is output from the FF circuit 15, as shown in FIG. 5(e).
Now, the recording medium, when injured or flawed by some cause or other, becomes unable to reproduce data correctly or detect the synchronous pattern correctly. So, generally the information recording-reproducing apparatus of this type is endowed with the verifying function of reproducing recorded data after the termination of recording to thereby check up whether the data has been recorded correctly. However, when such a small defect that cannot be discovered by the verifying check-up is present in the recording medium, it may develop into an error in the future due to a variation with time in the recording medium, a change in the environmental conditions of the apparatus or the irregularity of individual apparatuses, thus causing unsatisfactory detection of the synchronous pattern or unsatisfactory reproduction of data. In such a case, in the aforedescribed reproducing system, reproduction is effected always under the same conditions, irrespective of the ordinary reproduction or the reproduction during the verifying check-up and therefore, the small defect as previously mentioned cannot be discovered and thus, it has been difficult to prevent unsatisfactory reproduction.